
Paramjeet Singh Pahwa
No headline available | Austin, Texas, United States
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Paramjeet Singh Pahwa’s Emails pa****@in****.com
Paramjeet Singh Pahwa’s Phone Numbers No phone number available.
Social Media
Paramjeet Singh Pahwa’s Location Austin, Texas, United States
Paramjeet Singh Pahwa’s Expertise DFX Engineer at Intel Corporation
Paramjeet Singh Pahwa’s Current Industry Intel
Paramjeet
Singh Pahwa’s Prior Industry
Cadence Design Systems
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St Microelectronics
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Intel
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San Jose State University
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Samsung Austin R And D Centre
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Work Experience

Intel
DFX Engineer
Fri Apr 01 2016 00:00:00 GMT+0000 (Coordinated Universal Time) — Present
Samsung Austin R And D Centre
Senior DFT Consultant
Sun Mar 01 2015 00:00:00 GMT+0000 (Coordinated Universal Time) — Fri Apr 01 2016 00:00:00 GMT+0000 (Coordinated Universal Time)
San Jose State University
Graduate Student
Thu Aug 01 2013 00:00:00 GMT+0000 (Coordinated Universal Time) — Tue Mar 01 2016 00:00:00 GMT+0000 (Coordinated Universal Time)
Intel
Staff Engineer(DFT)
Mon Nov 01 2010 00:00:00 GMT+0000 (Coordinated Universal Time) — Mon Jul 01 2013 00:00:00 GMT+0000 (Coordinated Universal Time)
St Microelectronics
Technical Leader(DFT)
Fri Dec 01 2000 00:00:00 GMT+0000 (Coordinated Universal Time) — Mon Nov 01 2010 00:00:00 GMT+0000 (Coordinated Universal Time)
Cadence Design Systems
Product Validation Engineer
Thu Jun 01 2000 00:00:00 GMT+0000 (Coordinated Universal Time) — Fri Dec 01 2000 00:00:00 GMT+0000 (Coordinated Universal Time)